• Senior Post Silicon Validation Engineer

    Location US-TX-Austin
    Posted Date 7 months ago(1/1/2018 8:27 PM)
    Job ID
    Annapurna Labs (U.S.) Inc.
  • Job Description

    Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries. We are seeking experienced Hardware Design Engineers to build the next generation of our cloud server infrastructure. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies.

    As a member of the Silicon Optimization Team you’ll be responsible for the design and optimization of hardware in our data centers. You’ll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you’ll work with thought leaders in multiple technology areas. You’ll have relentlessly high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve your products performance, quality and cost. We’re changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.


    - Ownership of post-silicon validation of system including both HW and SW.
    - Develop and execute post-silicon test plans by running SW on silicon.
    - Develop software to test, evaluate and stress the silicon and system
    - Responsible for booting, silicon bring-up, debug, and device characterization.
    - Work in the pre-silicon verification environments and with emulation to ensure successful bring-up.
    - Contribute to debug architecture to enable efficient debug of silicon.
    - Understand intended applications and stress systems from a customer perspective.

    Basic Qualifications

    - Minimum of 12 years of experience in post-silicon validation and pre-silicon verification
    - Experience in chip bring-up and silicon debug
    - Software expertise including C/C++ programming experience
    - Automation and scripting experience
    - Understanding of firmware and device drivers
    - Expertise in industry standard I/O interfaces

    Preferred Qualifications

    Preferred requirements:
    - Experience in pre-silicon verification (UVM test benches).
    - Experience in FPGA or Emulation testing and debug.
    - Experience in I/O characterization
    - Performance analysis and verification.
    - Familiarity with lab equipment (logic analyzer, software debugger)
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